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drivers: ethernet: vsc8541: various fixes #91726
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drivers: ethernet: vsc8541: various fixes #91726
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robhancocksed
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Jun 16, 2025
- Added missing MDIO enable/disable calls around accessing PHY registers, to make sure the MDIO bus is active first
- Cleaned up internal functions to use uint16_t for PHY register values
- Fixed inverted reset GPIO line
- Added SW reset timeout
- Implemented cfg_link function required by some MAC drivers
It looks like the arch.interrupt.gen_isr_table_local.riscv test is failing on the ganymed_bob and ganymed_sk boards where I modified the .dts files. However, those build errors also seem to happen on the main branch, so they seem unrelated to these changes? |
@@ -30,7 +30,7 @@ | |||
reg = <0x0>; | |||
status = "okay"; | |||
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reset-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; | |||
reset-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; |
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add a entry in the migration guide, stating that this got fixed, so users with custom boards know that they have to change it too
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Added
*/ | ||
static int phy_mc_vsc8541_cfg_link(const struct device *dev, enum phy_link_speed speeds) | ||
static int phy_mc_vsc8541_cfg_link(const struct device *dev, enum phy_link_speed adv_speeds) |
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maybe wait until #91354 is merged, it will provide phy_mii_cfg_link_autoneg()
to set the autoneg registers according to the ethernet specs
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Rebased on top of those changes - we can now make use of some of the common phy_mii code here.
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if (count++ > 1000) { | ||
LOG_ERR("phy reset timed out"); | ||
return -ETIMEDOUT; | ||
} |
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/* we use limited advertising, to force gigabit speed */
/* initial version of this driver supports only 1GB/s */
/* 1000MBit/s + AUTO */
ret = phy_mc_vsc8541_write(dev, PHY_REG_PAGE0_ADV, (1 << 8) | (1 << 6) | 0x01);
if (ret) {
return ret;
}
ret = phy_mc_vsc8541_write(dev, PHY_REG_PAGE0_CTRL1000, (1 << 12) | (1 << 11) | (1 << 9));
if (ret) {
return ret;
}
/* start auto negotiation */
ret = phy_mc_vsc8541_write(dev, PHY_REG_PAGE0_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
if (ret) {
return ret;
}
this can probably be removed, autoneg is enabled by default
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Done
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if (ret) { | ||
return ret; | ||
} | ||
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/* start auto negotiation */ | ||
ret = phy_mc_vsc8541_write(dev, PHY_REG_PAGE0_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); |
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this linke is also no longer needed, as we don't change the autoneg regs on startup, so we don't need to restart it, autoneg is btw enabled by default
/** | ||
* @brief Reconfigure the link speed | ||
* | ||
* @param dev device structure to phy | ||
* @param adv_speeds speeds to be advertised | ||
* @param flags configuration flags | ||
*/ |
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these kind of descriptions for doxygen are only needed for public apis in their headers, not in the source files
*/ | ||
static int phy_mc_vsc8541_cfg_link(const struct device *dev, enum phy_link_speed speeds) | ||
static int phy_mc_vsc8541_cfg_link(const struct device *dev, enum phy_link_speed adv_speeds) |
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@maass-hamburg I cherry-picked in the commit you mentioned, as well as one other with a mutex change, from your branch and rebased my changes on top of it. I think I have addressed your other comments as well. |
As noted before, those ganymed_bob and ganymed_sk test failures are not new, they also are occurring on weekly builds on the main branch. |
- implement configure link - support half duplex - use defines from mii.h - fix check ret vals Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com> Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
use mutex to protect page register phy_mc_vsc8541_get_link got removed from phy_mc_vsc8541_link_cb_set so, that phy_mc_vsc8541_link_monitor (own thread) is the only one to change data->state Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Fixed some build warnings in the driver from previous changes by removing an unused variable and hooking up the cfg_link function. Also removes some implicit boolean conversions. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The driver was not enabling the MDIO bus before trying to access registers. Added enabling and disabling the bus around PHY register accesses. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The internal register read/write functions used uint32_t for the values even though the registers are only 16 bits wide, resulting in a bunch of casting. Change the internal functions to use uint16_t and wrap them for the external read/write API which uses uint32_t. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
For GPIOs driving active-low signals, such as the VSC8541's reset pin, they are supposed to be declared as active low in the device tree, and set to 1 to assert and 0 to clear. Change the driver as such so that it does not leave the PHY stuck in reset when so configured. Also changed all in-tree board DTS files for this PHY to properly declare the reset GPIO as active low. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Mention a change to the reset-gpios handling in the vsc8541 PHY driver. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
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The driver previously could enter an infinite loop if the PHY software reset failed to complete, which could happen due to hardware reset issues or MDIO bus problems. Add a timeout of 1000 iterations so we report an error in this scenario rather than causing a lockup. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Add support for disabling autonegotiation to the cfg_link callback, as with the phy_mii driver. Signed-off-by: Robert Hancock <robert.hancock@calian.com>
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@robhancocksed please rebase to current main, hopefully the unrelated CI fails had been fixed, if not please open an issue |
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needs #92194 to be fixed |
As you noted, the test failures on ganymed_bob are also occurring on the main branch, so rebasing will not help at this point. I assume this PR is flagging those failures since it touched the .dts files for those boards. So either this can be merged despite the test failures, or #92194 will need to be fixed. |
correct, probably needs a fix like #91391 but for your effected boards |
@robhancocksed RC1 has been tagged, which means all new PRs need to be bug fixes with an attached GitHub issue. Given that this PR is all bug fixes, can you create an issue and attach it to this PR so we can merge for RC2? |